The present invention provides a resistance random access memory structure, including a plurality of word lines in a substrate, a plurality of reset lines coupled to the word lines, a dielectric layer on the substrate, a plurality of memory units in the dielectric layer. Each of the memory units includes a bottom electrode, a top electrode and a resistive thin film between the top electrode and the bottom electrode. The top electrodes of the memory units in a same column e coupled to one of the reset lines and a plurality of the bit lines on the memory units. The bottom electrodes of the memory units in a same row are coupled to one of the bit lines. Because the present invention provides reset lines for Type 1R1D RRAM, it can overcome the non-erasable of the conventional Type 1R1D RRAM.