A semiconductor device including a large capacity non-volatile memory and at least one random access memory, said the access time of said device being matched to the access time of each random access memory. The semiconductor memory device is comprised of: a non-volatile memory FLASH having a first reading time; a random access memory DRAM having a second reading time which is more than 100 times shorter than the first reading time; a circuit that includes a control circuit connected to both the FLASH and the DRAM and enabled to control accesses to those FLASH and DRAM; and a plurality of I/O terminals connected to the circuit. As a result, FLASH data is transferred to the DRAM before the DRAM is accessed, thereby matching the access time between the FLASH and the DRAM. Data is written back from the DRAM to the FLASH as needed, thereby keeping data matched between the FLASH and the DRAM and storing the data.