An integrated circuit (IC) having an IC floorplan silhouette-like power supply net, and a computer executable Sea of Supply (SoS) Electronic Design Automation (EDA) tool for automatically designing same. An IC floorplan silhouette-like power supply net preferably includes both a Sea-of-Supply (SoS) power net and a Sea-of-Supply (SoS) ground net each exclusively occupying different layers of the two lowermost metal layers of an interconnect structure overlying its underlying transistor embedded silicon based structure. The SoS nets are the logical complement of preferably all the exempt areas of an IC floorplan.