A method for including probe locations in an integrated circuit may include specifying probe cells prior to the place and route stage of the design process. The probe cell locations may be specified in a functional description of the integrated circuit, such as an HDL description from which a netlist may be generated. Alternatively, an existing netlist may be edited to include the probe cells on specified nets. The probe locations are included in the physical layout design along with the rest of the integrated circuit components during place and route. The integrated circuit may be fabricated according to the physical layout design so that the fabricated integrated circuit includes the one or more probe locations.