A method of inlining a function call of a first high level design language (HDL) into a second HDL is disclosed comprising the steps of: (a) translating the function call of the first HDL into a function body file of the second HDL; (b) translating a signature of the function call of the first HDL into a data file including predetermined data of the function signature; and (c) translating the function call of the first HDL into a sequence of macro definitions based on the corresponding data file followed by a compiler directive to include the corresponding function body file of the second HDL. In one embodiment, the first HDL is a VHDL and the second HDL is a Verilog HDL.