An on-chip interface circuit located between the chip's power supply pin and its internal circuitry senses the current load of the internal circuitry and provides a supplemental current sink so that total current demand seen at the power supply pin is substantially constant despite the internal circuitry's variable load. Sensing of the internal load is done by a sensor stage with two parallel branches, each branch having a resistor, a sense transistor, and a current mirror device, which together produce a voltage drop as a control voltage output which relates the internal load to a constant reference current. The supplemental current sink is in the form of a transistor operating below saturation in its linear region and whose gate is coupled to receive the control voltage output of the sensor stage.