A circuit and method are contemplated herein for improving instruction fetch
time
by determining mapping information prior to storage of the mapping information
in a lower-level memory device. In one embodiment, the circuit and method are adapted
to format and align the prefetched instructions into predecoded instructions, and
determine mapping information relating the prefetched instructions to the predecoded
instructions. In addition, the circuit and method may be adapted to store the mapping
information along with corresponding predecoded instructions. By determining the
mapping information prior to storage of the mapping information within the lower-level
memory device, the circuit and method advantageously increases the rate at which
the predecoded instructions may be fetched from the lower-level memory device.