A method of performing a thread switching operation within a multithreaded processor
includes detecting dispatch of a first predetermined quantity of instruction information
of a first thread, from an instruction streaming buffer to an instruction pre-decoder
within the multithreaded processor. Responsive to the detection of the dispatch
of the first predetermined quantity of instruction information for the first thread,
a thread switching operation is performed with respect to the output of the instruction
streaming buffer. The dispatch of instruction information for a second thread from
the instruction streaming buffer is thus commenced. The predetermined quantity
of the instruction information may be equal to or greater than a minimum quantity
of instruction information for a full instruction of a first instruction set.