An analog-to-digital (ADC) converter circuit that converts an analog input signal into a digital output circuit includes a calibration coefficient computation circuit for computing calibration coefficients of a calibration filter. The calibration coefficient computation circuit includes a switching device adapted to switch the analog input signal delivered to the ADC circuit between on and off states, and includes a pseudo-random signal generator adapted to input a pseudo-random signal to the ADC circuit. During a start-up phase of the ADC circuit, the ADC circuit, the switching device turns off the analog input signal to the ADC circuit, the pseudo-random signal generator inputs a pseudo-random signal into the ADC circuit, and the calibration coefficient computation circuit computes the calibration coefficients of the calibration filter. This ADC circuit configuration reduces startup time for the calibration filter to only a few clock cycles.