A digital signal processor generates in-phase, quadrature-phase and amplitude signals from a baseband signal. A modulator modulates the in-phase and quadrature-phase signals to produce a modulated signal. A phase locked loop is responsive to the modulated signal. The phase locked loop includes a controlled oscillator having a controlled oscillator input. An amplifier includes a signal input, amplitude control input and an output. The signal input is responsive to the controlled oscillator output and the amplitude control input is responsive to the amplitude signal. The in-phase and quadrature-phase signals may be normalized in-phase and quadrature-phase signals. Alternatively, a phase tracking subsystem may be provided that is responsive to the quadrature modulator to produce a phase signal that is responsive to phase changes in the modulated signal and that is independent of amplitude changes in the modulated signal. An amplitude tracking subsystem also may be provided that is responsive to the modulator to produce an amplitude system that is responsive to amplitude changes in the modulated signal and that is independent of the phase changes in the modulated signal. An amplifier has a signal output, an amplitude control input and an output. The signal input is responsive to the phase signal and the amplitude control input is responsive to the amplitude signal.