Search engine devices include a content addressable memory (CAM) core having
a plurality of CAM array blocks therein and a control circuit that is electrically
coupled to the CAM core. The control circuit is configured to support internal
error detection and correction operations using modified Hamming code words. These
operations are performed without significant impact on the compare bandwidth of
the search engine device, even when operations to read entries from the CAM core
are performed as foreground operations that may block concurrent search operations.
The control circuit may perform the error detection and correction operations by
issuing multiple read instructions. These instructions include a first instruction
(e.g., error check instruction) to read at least a first entry into the CAM core
for the purpose of error detection and then, in response to detecting the first
entry as erroneous, issuing a second instruction to read the first entry from the
CAM core. The entry is then corrected and written back into the CAM core.