A processing unit 12 that is provided in a memory unit 10 can transfer information that is stored in a corresponding address to a spare memory area and prohibit writing of information into the corresponding address when the number write operations to the respective addresses of flash memories 11-1 through 11-3 reaches a set number or when the error frequency in the information stored in the respective addresses reaches a set frequency. When the remaining capacity of a spare memory area reaches a set capacity, an indication lamp 14 may lit or a memory status signal may be transmitted to a processing unit 21 of a computer 20 and displayed on a display unit 30. The memory processing unit 12 may lit the indication lamp 14 when the number write operations to the respective addresses of flash memories 11-1 through 11-3 reaches a set number or when the error frequency in the information stored in the respective addresses reaches a set frequency.