Processing a chip layout (e.g. optical proximity correction (OPC) or verification) can be time consuming and require the use of expensive tools. Organizing the original layout using segments can minimize both of these resources. For example, shapes within a unit can be dissected into segments. Each segment can be compared to segments stored in a database. If the segment matches a listed segment, then the segment can be linked to the listed segment. Matching can be done by identifying corners within a neighborhood of each segment. If the segment and its neighborhood do not match those of a listed segment, then a new database entry can be created. Only representative segments are used to perform processing, thereby significantly improving resource allocation. The results from the representative segments can be copied to their respective linked segments, thereby ensuring accuracy of the processing.