A digital-to-analog converter generates a monotonic sequence of reference voltages and selects an arbitrary pair of reference voltages, adjacent in the monotonic sequence. One of the selected reference voltages is supplied through a resistor and a switching device, connected in series, to the output terminal of the converter. The other selected reference voltage is supplied through another resistor and another switching device, connected in series, to the same output terminal. This arrangement saves space, and enables variations in the output voltage levels to be kept within tolerance by use of resistors with sufficiently high resistance values.

 
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