An integrated circuit including a performance circuit occupying a first area of an integrated circuit substrate and a protection circuit coupled to the performance circuit and occupying a second area of an integrated circuit substrate separate from the first area. Also, a method of forming an integrated circuit including the steps of: Forming a performance circuit occupying a first area of an integrated circuit substrate, forming a protection circuit occupying a second area of an integrated circuit separate from the first area, and coupling the protection circuit to the performance circuit.

 
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< Semiconductor memory with peripheral transistors having gate insulator thickness being thinner than thickness of memory and select transistors

< Storage layer optimization of a nonvolatile memory device

> Isolation structures in semiconductor integrated circuits (IC)

> System for integrating a circuit on an isolation layer and method thereof

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