A trench gate semiconductor device, which can improve the difficulty of channel inversion to thereby improve the switching characteristics as maintaining the effect of suppression of short-channel effects and the high dielectric voltage characteristic between the gate and the drain. The trench gate semiconductor device includes a gate electrode (18) buried in a trench (14) formed in an Si substrate (12) through a gate insulating film (16), and a source/drain diffusion layer (20) formed in a surface region of the Si substrate (12) on the opposite sides of the trench (14). In this trench gate semiconductor device, the corner portions (14a) and (14b) formed by the side walls and the bottom wall of the trench (14) are rounded so as to form concave surfaces concaved inward of the trench (14).