A memory system includes a memory module having a plurality of memory devices and a supplemental memory device that stores information pertaining to the plurality of memory devices. The memory module also includes an integrated circuit device having controller circuitry that communicates with the plurality memory of devices, the integrated circuit device including a receiver circuit to sample receive data from an external signal line at a sample time, and a first register to store a first value representative of a sampling time adjustment that is applied to the sample time. The first value is determined based on the information pertaining to the plurality of memory devices.