Methods and apparatus for controlling hierarchical cache memories permit: controlling a first level cache memory including a plurality of cache lines, each cache line being operable to store an address tag and data; controlling a next lower level cache memory including a plurality of cache lines, each cache line being operable to store an address tag, status flags, and data, the status flags of each cache line including an L-flag; and setting the L-flag of a given cache line of the next lower level cache memory to indicate whether or not a corresponding one the of the cache lines of the first level cache memory has been refilled with a copy of the data stored in the given cache line of the next lower level cache memory.