A method of forming an integrated circuit with a semiconductor substrate is provided. A gate dielectric is formed on the semiconductor substrate, and a gate is formed on the gate dielectric. Source/drain junctions are formed in the semiconductor substrate. A silicide is formed on the source/drain regions and on the gate. Trenches are formed in the semiconductor substrate around the gate. An interlayer dielectric is deposited above the semiconductor substrate, and contacts are then formed to the silicide.

 
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< CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding

> Arrangement of microstructures

> Capacitive resonators and methods of fabrication
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