An input buffer is configurable for use as a standard buffer with a single switching
threshold, selectable to be one of at least two different switching thresholds,
or used as a Schmitt trigger circuit with hysteresis, which uses at least two switching
thresholds from among the at least two different switching thresholds. The integrated
circuit may be a programmable logic device (PLD) or field programmable gate array
(FPGA), but in other embodiments, the integrated circuit may be other types of
devices such a microprocessors, ASICs, or memories.