An analog-to-digital converting apparatus for rapidly processing a plurality of analog input signals at a high rate and a display device using the same. The apparatus includes a clock signal generator that generates a clock signal with a predetermined frequency; a control signal generator that generates a switching control signal using the clock signal; a multiplexer (MUX) that receives and selectively outputs signals of the plurality of analog input signals according to the switching control signal; and an analog-to-digital converter (ADC) that converts an analog signal selected and output by the MUX to a digital signal.