An Forward Error Correction (FEC) apparatus and method for reducing Bit error rates (BER) and Frame Error Rates (FER) using turbo decoding in a digital communication system. In a constituent decoder for decoding a turbo code, a first adder calculates the LLR of a received code symbol by calculating the difference between the probability of the code symbol being 1 and that of the code symbol being 0 at an arbitrary state of a turbo decoding trellis. A second adder adds the transmission information and a priori information of the code symbol. A third adder calculates the difference between the outputs of the first and second adders as extrinsic information. A first multiplier multiplies the output of the third adder by a predetermined weighting factor as a feedback gain. A correction value calculator calculates a correction value using the difference between the best metric and the second best metric of the code symbol. A fourth adder adds the correction value to the output of the first multiplier.

 
Web www.patentalert.com

< Home appliance networking system and method for controlling the same

< Connection management method for devices connected digital interface and command structure therefor

> System and method for displaying scale-down picture

> Video display apparatus having hotkey functions and a method therefor

~ 00254