A memory cell device and method that includes a memory cell, and first and second write pulse signals. The memory cell has phase-change material capable of being set and capable of being reset. The first and second write pulse signals are used for a single reset operation of the memory cell. The first write pulse signal heats and melts a first portion of the phase-change material of the memory cell. The second write pulse signal heats and melts a second portion of the phase-change material of the memory cell.