A signal storage processor (101) stores signals input from a signal input unit (100) in a buffer (102) for respective lines. A vertical discrete wavelet transformer (103) reads out an index value L from the signal storage processor (101), and obtains a reference address B from the value L. If L=2, B=2. If L=4, B=0. Furthermore, the vertical discrete wavelet transformer (103) reads out the i-th column of sets of data, which are stored in the buffer (102) and are continuous in the vertical direction (i.e., data read out from four addresses (addresses in the buffer (102)) i4+B, i4+mod((B+1),4), i4+mod((B+2),4), and i4+mod((B+3),4)), and computes the one-dimensional discrete wavelet transforms of the readout data.