A fault after an assembling process is saved by using a tester. An error detector circuit compares read data from a memory cell and data from an external input/output terminal by means of a comparator circuit, thereby determining whether a memory cell is good or faulty. The error detector circuit outputs a sense signal COMPERR in the case where the memory cell is faulty. A self fuse program circuit causes a latch circuit LAi to latch an external address as a save address upon receipt of the sense signal COMPERR. By a counter Ci and a switch circuit SW, programming of a save address is carried out by transferring the save address latched at the latch circuit LAi to a fuse program circuit FPi on one bit by one bit basis.