A design for test focused tester has a single printed circuit board tester architecture. By focusing on design for test testing and eliminating functional testing, the design for test focused tester reduces or eliminates requirements for high speed, precision signal formatting and timing circuitry that require a multiple board architecture interconnected via a high speed backplane. The single board architecture places a vector sequencer and vector memory close to the device under test, which provides short, consistent signal paths to the device and eliminates the need for dead cycles and synchronization between tester boards.

 
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< Detailed placer for optimizing high density cell placement in a linear runtime

< Automated processor generation system for designing a configurable processor and method for the same

> Little offset in multicycle event maintaining cycle accurate tracing of stop events

> Synchronization point across different memory BIST controllers

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