In the video data compression apparatus 1, the host computer 20 controls the operation of the constituent parts of the video data compression apparatus 1. Further, the host computer 20 receives the amount of data of the compressed video data generated by preliminarily compressing and coding the noncompressed video data VIN by the encoder 162 of the simplified two pass processing unit 16, the value of the direct current component (DC component) of the video data after the DCT processing, and the power value of the alternating current component (AC component) via a control signal C16 and calculates the difficulty of the pattern of the compressed video data based on these received values. Further, the host computer 20 allocates the target amount of data T_j of the compressed video data generated by the encoder 18 via the control signal C18 for every picture based on the calculated difficulty, sets the same in the quantization circuit 168 (FIG. 3) of the encoder 18, and adaptively controls the compression rate of the encoder 18 in units of pictures.