A configurable switch that enables multiple CPUs to be connected to multiple I/O devices through a single switch. The switches can be cascaded to enable more CPUs and/or more I/O devices in the tree. The configuration is transparent to the enumeration of the bus and endpoint devices. A simple management input such as SMBus or hardware strapping is used to set up the assignation of devices to CPUs. Utilization of a manager and the PCI Express hot plug controller registers enable hot-plug reconfiguration of the device tree as devices a switched between CPUs via PCI buses within the switch.