A power switching circuit includes a power MOS transistor that has a maximum source-drain voltage substantially higher than a permissible gate-source voltage, and that has a current path connected in series with a load between first and second supply terminals, and comprising a gate driver circuit that drives the gate of the power MOS transistor directly from the supply voltage. A gate driver circuit has a pair of series-connected switching transistors connected between the first and second supply terminals. An interconnection node between the switching transistors is connected to the gate of the power MOS transistor. The gate driver circuit further includes a reference voltage source and a voltage comparator comparing the gate voltage of the power MOS transistor with the reference voltage to provide a disabling output that disables one of the switching transistors when the gate voltage of the power MOS transistor reaches the reference voltage. By selecting a reference voltage level not higher than the maximum permissible gate-to-source voltage of the power MOS transistor, its gate is effectively protected from excessive gate-to-source voltage. Yet, the switching transistor in the gate driver circuit other than that connected to the ground supply terminal (usually referred to as Vcc terminal), may have its current path connected directly, or through just a feedback resistor, to the high supply terminal (usually referred to as Vcc terminal).