A computer system includes a register that is configured to contain a zero value. In response to a predetermined occurrence on the computer system, such as a hardware interrupt, the computer system launches a trap routine. This routine generates output data that needs to be stored within the memory space of the computer system. In order to write out this data from within the trap routine, a desired target address is specified as a negative offset from the zero value stored in the register. This avoids the need to have to locate another (unused) register in which to store the write address.