An n-bit digital/analog converter is provided for converting an n-bit digital word to a corresponding voltage. The converter comprises an (n-1) bit bufferless switched capacitor digital/analog converter (10) having an output (V.sub.out) for direct connection to a capacitive load (C.sub.LOAD). The (n-1) bit converter (10) also has first and second reference voltage inputs (V.sub.1, V.sub.2) and an (n-1) bit digital input. An (n-1) bit selective inverter (13.sub.1, . . . , 13.sub.n-1, 14.sub.1, . . . , 14.sub.n-1) supplies the (n-1) least significant bits to the digital input and inverts them if the most significant bit has a certain value. A switching arrangement (11, 12) connects the first and second reference voltage inputs (V.sub.1, V.sub.2) to receive first and second or second and first reference voltages depending on the value of the most significant bit.