A data handling device comprising a communication controller, having a data gate provided for receiving and transmitting data, said communication controller being connected to a processor having an n-bits addressing capacity and to a memory having a set of buffers comprising a first subset provided for storing data segments retrieved from said data and which buffers of said first subset are accessible under control of said processor by a buffer address indicating a buffer location in said memory and generated by using a buffer descriptor stored in a buffer descriptor list, said memory having a second subset of buffers which are not accessible by said addressing capacity. Said buffers of said second subset being addressable by using further buffer descriptors stored in said buffer descriptor list. Said processor comprising driving means for managing the transfer of data segments between the buffers of the first and second subset.