A microelectromechanical device and a method for producing it having at least one layer on a substrate, in particular a thermoelectric layer on a substrate, the thermal expansion coefficient of the at least one layer and the thermal expansion coefficient of the substrate differing greatly. The at least one layer is coupled to at least one stress reduction means for the targeted reduction of lateral mechanical stresses present in the layer. This achieves a stress-free layer or enables stress-free growth.

 
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< Semiconductor circuit with multiple contact sizes

< Three-dimensional memory structure and manufacturing method thereof

> Heterojunction bipolar transistor having specified lattice constants

> Semiconductor device and fabricating method thereof

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