A PLL circuit compares a PCR with the output frequency of a voltage
controlled oscillator (VCO), and returns a voltage value which is the
result of the comparison to the VCO, so that a reference clock
corresponding to the PCR is outputted from the VCO. A switch supplies a
control voltage from the PLL circuit to the VCO when digital broadcasting
is viewed, while feeding a fixed voltage from a fixed voltage power
supply to the VCO when analog broadcasting is viewed, to stably output a
clock having a frequency of 27 MHz irrespective of the change in the PCR.