A method, apparatus and computer product wherein interrupt thresholds are automatically adjusted based on the current state of the processor. The processor provides an output signal, possibly on one or more lines, that is indicative of the state the processor is in such as active, idle sleep. The peripherals monitor this signal and their interrupt thresholds are varied to be low when the processor is active and to be high when the processor is asleep. This causes the peripherals to delay their respective interrupts when the processor is asleep. When the processor is awakened, all peripherals requiring it may be serviced.

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