A digitally-controlled, DC/DC converter includes a switched-mode power stage for the purpose of converting an input voltage (Vin) into an output voltage (Vout); the power stage including a controllable switching device, which is turned ON and OFF by a control device with temporal resolution .DELTA.t. The converter further includes a duty cycle control mechanism for controlling the duty cycle of the controllable switching device; the duty cycle control mechanism including a mechanism for estimating the output voltage error, and a selector mechanism for determining the turn OFF and turn ON times of the controllable switching device by choosing, cycle by cycle, an ON time/OFF time pair from a set of quantized ON time/OFF time pairs, choosing in such a manner that the amplitude of the output voltage error is continually minimized. At each switching cycle, the current output voltage error estimate is generated, and the ON time/OFF time pair chosen, after the switch has turned ON, but before the turn OFF time implicit in the chosen pair.