A surge current prevention circuit and DC power supply for preventing surge current in various operation applications with a small circuit configuration. A power switch connects an external power supply and a load. A first PMOS transistor is connected to a constant current supply. A second PMOS transistor, which forms a current mirror, is connected to a first and second NMOS transistor. A third PMOS transistor is connected to the first and second NMOS transistor, a third NMOS transistor, and fourth and fifth NMOS transistors. A control input is connected to the third NMOS transistor. The first NMOS transistor is connected to the fourth NMOS transistor. An external power supply is connected to the second NMOS transistor. The load is connected to the fourth NMOS transistor.