The object of the present invention is to enable to prevent an erroneous erase of a data stored or writing another data on the data as well as to enable to easily switch an erroneous erase prevention switch.A command generator 35, upon reception of a register instruction for checking a state of a memory card 2 received via an S/P & P/S sequencer, sets a state of an erroneous erase prevention switch 23 in a register and transmits this register content via the S/P & P/S sequnecer 31 to a host computer. According to the register content from the memory card, the host computer decides whether a write protect is ON and executes a write inhibit processing when the write protect is ON.