A method, apparatus and computer program product are provided for implementing RTL power sequencing simulation of voltage islands for application specific integrated circuit (ASIC) designs. RTL sequential state saving elements in a voltage island hierarchy are identified. A state is invalidated for each identified RTL sequential state saving element during a power down operation. Switch objects are used to identify and skip globally powered gate level circuits in the voltage island. RTL sequential state saving elements and VI switch objects can be identified using predefined reserved signal identifiers in the ASIC library.

 
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