A serial flash-memory chip has a serial-bus interface to an external controller. A flash-memory block in the serial flash-memory chip can be read by the external controller sending a read-request packet over the serial bus to the serial flash-memory chip, which reads the flash memory and sends the data back in a data-payload field in a completion packet. Data in a write-request packet is written to the flash memory, and a message packet sent back over the serial bus. The serial bus can be a Peripheral Component Interconnect (PCI) Express bus with bi-directional pairs of differential lines. Packets have modified-PCI-Express headers that define the packet type and data-payload length. Vendor-defined packets can send flash commands such as reset, erase, or responses after operations such as program or erase. A serial engine and microcontroller or state machine are on the serial flash-memory chip.