A method of storing, sensing and restoring three voltage levels (1.5 bit per cell) of a plurality of memory cells in Dynamic random access memory is disclosed. An asymmetrical sense amplifier, ASA, together with a 2 to 2 multiplex, will be used to detect the voltage difference on the bit lines and transfer the voltage difference to digital data. ASA is designed to have one input stronger than the other input. The multiplex is controlled by a signal so that the connection between bit line pair and two inputs of ASA is switched at different time and logical address. Other transistors and circuits are also used to store and restore the voltage levels into memory cells. Coding algorithms are used to get fast read speed of this multi-level cell DRAM.