A control circuit for a DC/DC converter which includes a main switching element, a sub switching element, and a reactor in order to convert a DC input voltage to a DC output voltage. The control circuit comprises a clock signal generator for generating a clock signal during a blank period in which both the main and sub switching elements are off; a comparator for comparing a reference voltage and a voltage at a connection point between the main and sub switching elements and for outputting a comparison signal indicating a relation of magnitude between the reference voltage and the voltage at the connection point; and an operation mode switching section for monitoring the comparison signal at a timing corresponding to the clock signal in order to detect a voltage state at the connection point, and controlling the sub switching element in accordance with the voltage state.