In a storage apparatus system, after having obtained the coherency between a file system of a main storage apparatus system and the stored data, a host computer issues a freezing instruction to a main DKC which transfers in turn the disk image at a time point of the issue of freezing instruction to a sub-DKC and then transmits a signal, showing that all the data has been transmitted, to the sub-DKC. In the sub-DKC, the disk image at a time point of reception of the freezing instruction is held until a signal showing that all the data has been transmitted is issued next time, and when the main storage apparatus system becomes unusable at an arbitrary time point, the data of the disk image, at a time point of issue of the freezing instruction, which is held by the sub-storage apparatus system can be utilized.

 
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> Chip protection register lock circuit in a flash memory device

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