A non-volatile memory is divided into logical zones by the card controller
in order reduce the size of the data structures it uses for address
translation. Zone boundaries are adjusted to accommodate defects allowed
by memory test to improve card yields and to adjust boundaries in the
field to extend the usable lifetime of the card. Firmware scans for the
presence of defective blocks on the card. Once the locations of these
blocks are known, the firmware calculates the zone boundaries in such a
way that good blocks are equally distributed among the zones. Since the
number of good blocks meets the card test criteria by the memory test
criteria, defects will reduce card yield fallout. The controller can
perform dynamic boundary adjustments. When defects occur, the controller
can perform the analysis again and, if needed, redistributes the zone
boundaries, moving any user data.