A method and apparatus for generating bits for a diagnostic routine of a memory subsystem. A memory device may be divided into n subdivisions of m bits each. Alternatively, n memory devices may each have m bits (in width). The system may also have a cache line having a certain number of check words. A diagnostic routine may begin with the generating one of 2.sup.m bit patterns and assigning m bits of the generated bit pattern to one of the check words in the cache line. Each of the m bits assigned to the check word in the cache line may have the same logic value. However, each bit of the n subdivisions may be associated with a different check word in the cache line with respect to other bits of the subdivision. The method may be repeated for each of the 2.sup.m bit patterns that may be generated.