A fault-tolerant magnetoresistive solid-state storage device (MRAM) in use performs error correction coding and decoding of stored information, to tolerate physical defects. At manufacture, the MRAN device is tested to confirm that each set of storage cells is suitable for storing ECC encoded data, using either a parametric evaluation (step 602), or a logical evaluation (step 603) or preferably a combination of both. Failed cells are identified and a count is formed, suitably in terms of ECC symbols 206 that would be affected by such failed cells (step 604). The count can be compared to a threshold (step 605) to determine suitability of the accessed storage cells and a decision made (step 606) on whether to continue with use of those cells, or whether to take remedial action.

 
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> Segmented MRAM memory array

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