Unhandled operation of a program instruction of a first instruction set,
such as a Java bytecode, is detected. Instead of invoking a mechanism for
directly dealing with that unhandled operation, one or more instructions
from a second instruction set, such as ARM instructions, are instead used
to emulate the instruction that was subject to the unhandled operation.
If these instructions of the second instruction set are also subject to
unhandled operation, then the mechanisms for dealing with unhandled
operation within that second instruction set may be invoked to repair
that operation. This approach is well suited to dealing with unhandled
operation of variable length instructions being interpreted with a
processor core having a native fixed length instruction set. In
particular, prefetch aborts and unhandled floating point operations may
be conveniently dealt with in this way.