Decoding device with a decoding module (4) that decodes digital digitally encoded image data. The decoding of said image data is dependent on the programming of an FPGA circuit. In a first embodiment, the key generator for the decoding module is provided with an FPGA circuit. In a second embodiment, the decoding module is provided with an FPGA circuit. The FPGA circuit and/or the FPGA memory can be located in a removable chip-card. The content of the FPGA memory can be updated by the sender over different possible transmission channels.

 
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