A system for verifying trace distances of a PCB layout includes a computer (10) and a database (11). The computer includes: a segment receiving module (100) for receiving segments of a selected trace, and depositing the segments in a segment set; a segment selecting module (101) for selecting an unverified segment from the segment set; a distance setting module (102) for setting a searching distance; an area ascertaining module (103) for ascertaining a rectangular area; a segment searching module (104) for searching segments of other traces in the rectangular area; a distance calculating module (105) for calculating a distance between the unverified segment and each searched segment; a distance comparing module (106) for comparing the calculated distances to obtain a shortest distance, and comparing the shortest distance with a preset benchmark distance; and a verification determining module (107) for determining whether all segments of the selected trace has been verified.

 
Web www.patentalert.com

> Using parallelism for clear status track processing during error handling behavior in a storage system

~ 00319