A thin film transistor (TFT) structure includes a substrate, a polysilicon structure including a plurality of channel regions, at least one lightly doped region and at least one heavily doped source/drain region, a plurality of gate structures, and an insulating layer formed between the gate structures and the polysilicon structure. The thickness of a first portion of the insulating layer under and between the gate structures is greater than the thickness of a second portion of the insulating layer adjacent to the first portion. At least one lightly doped region is formed under the first portion of the insulating layer and at least one heavily doped source/drain region is formed under the second portion of the insulating layer via the same doping procedure.